This invention relates to simulating performance of active semiconductor devices, such as field effect transistors (FETs), and electronic circuits, such as amplifiers, which incorporate such devices and, more particularly, to modeling such devices so that their individual performance, or performance in an electronic circuit, can be precisely simulated on a computer aided engineering (CAE) system, for example, to facilitate design of practical devices and electronic circuits. Specifically, one embodiment of the invention is directed to providing a large-signal model of an active semiconductor device, which faithfully replicates the large-signal performance of the device being simulated over an extended operating frequency range from d.c. (zero Hz) to radio frequencies (e.g., 10 MHz and higher), including microwave and millimeter wave frequencies, during circuit simulation, based to at least some extent on response data measured when controlling bias voltages are applied to an actual physical specimen of the device to be simulated.
For the purpose of description, the method and apparatus for modeling an active semiconductor device in accordance with the invention will be described in connection with providing a large-signal FET model, which is substantially independent of the technology and manufacturing process employed to fabricate the FET. However, the principles of the invention apply to the modeling of other active semiconductor devices, and, therefore, modeling of an FET should be considered exemplary only and not as a limitation of the disclosed method and apparatus in accordance with the invention. Various active semiconductor device models employed for circuit simulation are known. See, for example, Root, D. E., and Kerwin, K. J., "CAD for Microwave Integrated Circuits," Microwave Integrated Circuits, ed. Konishi, Marcel Deckker, 1991, pages 573-592.
A large-signal model useful for circuit simulation must accurately and efficiently represent the terminal characteristics of an FET, while maintaining a mathematical compatibility with the model equations solved by a nonlinear circuit simulator incorporated into an associated CAE system which performs a simulation based on the model. Generally, nonlinear circuit simulators solve model equations for equivalent circuits based on Kirchoff's current and voltage laws.
Large-signal FET models for circuit simulation are therefore typically defined based on the equivalent circuit topology of the FET and the specific functional form of the constitutive relationships of nonlinear elements, which specify such functions as model currents and charges in terms of various controlling bias voltages. This provides the requisite compatibility of the model equations for the nonlinear circuit simulator.
However, model equations based on circuit theory are simplistic idealizations. In contrast, partial differential equations of electromagnetism and semiconductor physics can be used to provide a more rigorous model of an FET. These more rigorous model equations, together with details of the manufacturing process for the FET being modeled, can be employed to provide a more complete delineation of the FET and circuit behavior, but, unfortunately, in practice, the resulting model equations are not susceptible to solution by conventional nonlinear circuit simulators.
Therefore, a significant challenge exists in effectively representing so complicated a physical system as an FET or electronic circuit incorporating an FET in terms of circuit theory to provide an acceptable model and also to possess the requisite compatibility with a conventional nonlinear circuit simulator. If equivalent circuits are used, a priori knowledge of the underlying semiconductor physics can aid in the choice of equivalent circuit topology, model equations, and parameter extraction methodology. Also, knowledge of inevitable limitations of the proposed model equations, such as relevant semiconductor physics which are not modeled, is important to understand results obtained during circuit simulation using the adopted model. Nevertheless, fundamental inaccuracies in the model persist.
Consider, for example, the simplified large-signal FET model equivalent circuit shown in FIG. 1. Lumped elements are employed to represent parasitic resistances and inductances, respectively, at the gate, source, and drain terminals of an FET. Branch currents are represented by current source functions I.sub.GS, I.sub.DS, and I.sub.GD. Nonlinear capacitors are represented by charge storage functions Q.sub.GS, Q.sub.DS, and Q.sub.GD. For simplicity, "R.sub.i " type elements (i.e., nonlinear losses) are not considered in the basic FET equivalent circuit model shown in FIG. 1.
The manner in which functions I.sub.GS, I.sub.DS, I.sub.GD, Q.sub.GS, Q.sub.DS, and Q.sub.GD are prescribed for circuit simulation leads to the general classification of model equations for FETs (consistent with this topology) as "physical" or "empirical." The line of demarcation based on this classification is not always clear. Some models have both physical and empirical features. Each model type has its respective advantages and shortcomings, as follows.
Physical models are typified in that the functional forms of the constitutive relationships defining circuit elements of the equivalent circuit are derived from semiconductor physics, and numerical values of the model parameters are obtained from manufacturing process considerations. One well-known example of a physical model is the Shockley model, in which the functional form of the model equations for an FET is based on physical Poisson and current-continuity equations. These model equations invoke simplifying assumptions, such as the known gradual-channel approximation and field-independent mobility, and derive a closed-form expression, for example, for the channel current, I.sub.DS, as: ##EQU1## The coefficients which appear in the equations of physical models are semiconductor material parameters, such as the dielectric constant, .epsilon., and the doping density, N.sub.D, and geometrical parameters, such as the depth of the channel, a, and length of the gate L. Within the same approximations, closed-form expressions for other functions, such as I.sub.GS, I.sub.GD, Q.sub.GS, Q.sub.DS, and Q.sub.GD, can be expressed in terms of the same physical parameters.
In principle, physical models for an FET can predict circuit-level performance from process and material characteristics without first fabricating and measuring an actual FET. Process variations can be accounted for simply by changing the numerical values of the physical and geometrical parameters which appear in the model equations. For example, increasing the doping density can be reflected in the model parameter N.sub.D, which affects the currents through Equation (1), and also affects the corresponding expressions for the nonlinear capacitor constitutive relationship based on Q.sub.GS, Q.sub.DS, and Q.sub.GD. Simulated small and large-signal quantities, such as transconductance, capacitance, output power, and harmonic distortion, are correlated through the mutual dependence of several large-signal model equations based on the same physical and geometrical parameters.
The main disadvantage of existing physical model equations is that the idealized conditions assumed by simple physical model theory rarely rigorously delineate actual FETs. Generally, physical model equations are not sufficiently accurate for quantitative large-signal FET simulation or design of a circuit incorporating such an FET. This is often because insufficient semiconductor physics is factored into the model equations to enable formulation of physical models amenable to circuit simulation. The assumptions of the Shockley model exemplified by Equation (1), for example, are not consistent with various important aspects of semiconductor physics, such as velocity saturation and two-dimensional effects, of present short-gate-length FETs. Moreover, physical models are specific to the FET type and are therefore dependent upon the specific technology and manufacturing process employed to fabricate the FET. For example, separate models are needed for MESFETs and MODFETs.
Furthermore, constitutive relationships within physical models derived from physical considerations may be valid only within a portion of the operating range of the controlling bias voltages. One of several distinct physical mechanisms may be responsible for a given characteristic, such as output conductance. Several breakdown mechanisms may be in effect simultaneously. Furthermore, it may be impractical to obtain precise values of a physical parameter, such as N.sub.D, from the manufacturing process. Ultimately, some physical models must be augmented with empirical functions, the parameters of which are selected to replicate FET performance for better quantitative agreement of simulation with actual measured performance characteristics of the FET.
By way of comparison, the constitutive relationships of empirical model equations are employed to represent the most salient nonlinear characteristics of FETs and are typified by the ease with which the associated parameters of the model can be extracted. The well-known Curtice cubic model described in Curtice, W. R., and Ettenberg, M., "A Nonlinear GaAs FET Model for Use in the Design of Output Circuits for Power Amplifiers," IEEE Trans. MTT-33, 12, 1985, pages 1383-1393, as exemplified by Equation (2), is an empirical model which provides an expression for channel current defining the voltage-controlled current source element I.sub.DS in the equivalent circuit shown in FIG. 1: EQU I.sub.DS =(A.sub.0 +A.sub.1 V.sub.1 +A.sub.2 V.sub.1.sup.2 +A.sub.3 V.sub.1.sup.3) tanh (.gamma.V.sub.DS), (2)
where V.sub.1 is an effective gate-source voltage which includes the observed shift of the pinch-off voltage with the drain-to-source voltage, V.sub.DS. The form of Equation (2), which contains a cubic polynomial and a transcendental function, is not derivable from physical, geometrical, or manufacturing process considerations. That is, the coefficients A.sub.i (i=0, 1, 2, 3, . . . ) have no physical meaning. The functions and parameters merely form a convenient mathematical expression to replicate a given measured controlling bias voltage dependence of an actual FET.
The most significant advantage of empirical models is generality. The Curtice model exemplified by Equation (2) can be fitted to measured performance data for the drain current characteristics of MESFETs and MODFETs from a variety of doping profiles, but not to the corresponding capacitances. Only the numerical values of the model parameters will differ. In contrast, the physical Shockley model exemplified by Equation (1) is valid only for the long-channel, constant-doped MESFET case.
Since the equations of empirical models are nonlinear in the parameter space, a nonlinear optimization procedure must be used. Numerical values for the parameters of empirical models can be obtained by fitting computed solutions of the model equations to measured performance data using known optimization techniques. This is the conventional parameter extraction procedure shown in FIG. 2. The empirical model parameters are varied until computed solutions exhibit optimum agreement with measured performance data for an actual FET. This requires a time-consuming optimization/solution loop 20. At each iteration (i.e., for every update of the model parameter values), the entire circuit containing the FET model, terminations, etc., must be re-computed by the nonlinear circuit simulator. Often, agreement will never be satisfactory for any value of the model parameters, because the model equations are too restrictive, and the nonlinear optimization techniques are susceptible to local minima which do not reflect the best possible fit. The final result often depends upon the initial guesses of the coefficient values, the range of measured performance data used for comparison to computed solutions, and the range of parameter values allowed during optimization.
The primary disadvantages of empirical models are that they are based on simplistic equations which do not accurately model actual FETs and they are unable to predict changes in FET performance for a given change in the manufacturing process, since empirical model equations are based on coefficients determined to replicate measured performance data, rather than being based on underlying parameters dependent upon the FET geometry or manufacturing process. Another drawback of empirical models is the cumbersome and case-specific nature of the parameter extraction methodology.
A significant advance in microwave circuit simulation has been the ability to insert measured S-parameter data for an active semiconductor device directly into a nonlinear circuit simulator. Such a nonlinear circuit simulator is the HP 85150B microwave design system manufactured by the Network Measurements Division of Hewlett-Packard Company, which is located in Santa Rosa, Calif. This nonlinear circuit simulator accepts amplitude and phase data measured versus frequency. Interpolation between discrete measurement points on an actual FET enables circuit simulations to be performed at frequencies for which there is no actual measured data. In this way, circuits containing active semiconductor devices and structures can be simulated, for which there are measured response data, but for which there are no satisfactory physical or empirical models. However, this nonlinear circuit simulator is limited in that only the linear range of operation of active semiconductor devices can be effectively simulated based on the S-parameter data.
Therefore, there is a need for large-signal modeling over an extended operating frequency range, that overcomes the shortcomings of the physical and empirical models, as well as linear circuit simulation, for providing model equations which model an active semiconductor device for high levels of nonlinearity and, additionally, specify the constitutive relationships of circuit elements, which result in model equations that can be employed in circuit simulation. It is desirable that the large-signal modeling system faithfully represent the performance of the actual active semiconductor device or circuit over a broad range of operating frequencies, large-signal amplitude levels, and operating points. It is also desirable that the associated model equations be compatible with conventional nonlinear circuit simulators so that the modeled active semiconductor device or circuit can be simulated by circuit simulators in present CAE systems.